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Low area and high throughput hardware implementations for the LILLIPUT cipher

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成果类型:
期刊论文
作者:
Yang, Jinling;Li, Lang;Huang, Xiantong
通讯作者:
Li, L
作者机构:
[Yang, Jinling; Li, Lang; Huang, Xiantong] Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.
[Yang, Jinling; Li, Lang; Huang, Xiantong] Hengyang Normal Univ, Hunan Prov Key Lab Intelligent Informat Proc & App, Hengyang, Peoples R China.
通讯机构:
[Li, L ] H
Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.
语种:
英文
关键词:
area-optimized;high throughput;Internet of Things;lightweight;LILLIPUT block cipher
期刊:
International Journal of Circuit Theory and Applications
ISSN:
0098-9886
年:
2023
页码:
-
基金类别:
Hunan Provincial Natural Science Foundation of China [2022JJ30103]; Key Disciplines and Application-oriented Special Disciplines of Hunan Province [[2022]351]; Science and Technology Innovation Program of Hunan Province [2016TP1020]; Open Fund Project of Hunan Provincial Key Laboratory of Intelligent Information Processing and Application for Hengyang Normal University [2022HSKFJJ011]
机构署名:
本校为第一且通讯机构
院系归属:
计算机科学与技术学院
物理与电子工程学院
摘要:
The relationship between encryption algorithm and key scheduling algorithm is utilized to achieve optimal sharing among components, which significantly reduces hardware area. The number of XOR gates and S‐boxes required for low area optimization is reduced by 52 and 8, respectively. Summary The widespread use of Internet of Things devices has increased the demand for lower cost and more efficient lightweight ciphers. However, there is a difficult trade‐off between cost and efficiency for lightweight block ciphers. The optimizations of area an...

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