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Research on power attack comprehensive experiment platform based on SAKURA -G hardware circuit

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成果类型:
期刊论文、会议论文
作者:
Ge Jiao;Lang Li;Yi Zou
作者机构:
[Ge Jiao; Lang Li; Yi Zou] College of Computer Science and Technology,Hengyang Normal University,Hunan Provincial Engineering Laboratory for Technology of Traditional Settlements Digitalization,Hunan Provincial Key Laboratory of Intelligent Information Processing and Application
语种:
英文
期刊:
Proceedings of Science
ISSN:
1824-8039
年:
2017
卷:
2017-July
页码:
9-15
会议名称:
CENet 2017-the 7th International Conference on Computer Engineering and Networks
会议时间:
2017-07-22
会议地点:
中国上海
基金类别:
supported by the National Natural Science Foundation of China(Grant No.:61572174);Hunan Provincial Natural Science Foundation of China(Grant No.:2017JJ2010);The Scientific Research Fund of Hunan Provincial Education Department(Grant No.:16B039);The open fund project of Hunan Provincial Engineering Laboratory for Technology of Traditional Settlements Digitalization(Grant No.:CT16K03);The Science and Technology Plan Project of Hunan Province(Grant No.:2016TP1020);The Science and Technology Plan Project of Hengyang(Grant No.:2015KJ26)
机构署名:
本校为第一机构
院系归属:
计算机科学与技术学院
物理与电子工程学院
摘要:
The power attack of the hardware circuit is going through the steps of algorithm writen in FPGA, power consumption, data processing and analysis. In order to solve the problem of the existing power attack experimental platform because the processing steps are too scattered, feature complex operations and other issues, we've thus developed a higher degree of integration of the experimental platform. The advanced encryption standard (AES) algorithm is taken as an example to illustrate the whole process of implementing the correlation power analys...

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