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Implementation of PRINCE with resource-efficient structures based on FPGAs

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成果类型:
期刊论文
作者:
李浪;冯景亚;刘波涛;郭影;李秋萍
通讯作者:
Feng, Jingya(fengjyk@126.com)
作者机构:
[李浪; 冯景亚; 刘波涛; 郭影; 李秋萍] Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang
421002, China
College of Information Science and Engineering, Hunan Normal University, Changsha
410081, China
College of Computer Science and Technology, Hengyang Normal University, Hengyang
通讯机构:
[Jingya Feng] H
Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang, China<&wdkj&>College of Information Science and Engineering, Hunan Normal University, Changsha, China
语种:
英文
关键词:
Lightweight block cipher;Field-programmable gate array (FPGA);Low-cost;PRINCE;Embedded security
关键词(中文):
轻量级分组密码;现场可编程门阵列(FPGA);低成本;嵌入式安全
期刊:
信息与电子工程前沿(英文)
ISSN:
2095-9184
年:
2021
卷:
22
期:
11
页码:
1505-1516
基金类别:
Project supported by the Scientific Research Fund of Hunan Provincial Education Department, China (Nos. 19A072 and 20C0268), the Science and Technology Innovation Program of Hunan Province, China (No. 2016TP1020), the Application-Oriented Special Disciplines, Double First-Class University Project of Hunan Province, China (No. Xiangjiaotong [2018] 469), the Science Foundation Project of Hengyang Normal University, China (No. 18D23), and the Postgraduate Scientific Research Innovation Project of Hunan Province, China (No. CX20190980)
机构署名:
本校为第一且通讯机构
院系归属:
计算机科学与技术学院
物理与电子工程学院
摘要:
In this era of pervasive computing, low-resource devices have been deployed in various fields. PRINCE is a lightweight block cipher designed for low latency, and is suitable for pervasive computing applications. In this paper, we propose new circuit structures for PRINCE components by sharing and simplifying logic circuits, to achieve the goal of using a smaller number of logic gates to obtain the same result. Based on the new circuit structures of components and the best sharing among components, we propose three new hardware architectures for PRINCE. The architectures are simulated and synth...
摘要(中文):
在当今普适计算时代,低资源设备已广泛部署在各个领域。PRINCE是一种专为低延迟设计的轻量级分组密码,适用于普适计算应用程序。本文通过共享和简化逻辑电路为PRINCE组件提出新的电路结构,以达到使用较少逻辑门获得相同效果的目标。基于组件新的电路结构和组件之间的最佳共享,提出3种新的PRINCE硬件架构,并在不同可编程门阵列设备上对3种硬件架构进行仿真和综合。基于Virtex-6平台的实验结果表明,与现有架构相比,展开、低成本和两周期架构的资源消耗分别减少73、119和380个可编程逻辑单元。低成本架构仅需137个可编程逻辑单元。展开架构需409个可编程逻辑单元,其吞吐量为5.34 Gb/s。据我们所知,...

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