作者机构：
College of Computer Science and Technology, Hengyang Normal University, Hengyang, China;Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang, China;[Yezhou Zhang; Lang Li; Yu Ou] College of Computer Science and Technology, Hengyang Normal University, Hengyang, China<&wdkj&>Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang, China
通讯机构：
[Lang Li] C;College of Computer Science and Technology, Hengyang Normal University, Hengyang, China<&wdkj&>Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang, China
摘要：
Deep learning algorithms are increasingly employed to exploit side-channel information, such as power consumption and electromagnetic leakage from hardware devices, significantly enhancing attack capabilities. However, relying solely on power traces for side-channel information often requires adequate domain knowledge. To address this limitation, this work proposes a new attack scheme. Firstly, a Convolutional Neural Network (CNN)-based plaintext-extended bilinear feature fusion model is designed. Secondly, multi-model intermediate layers are fused and trained, yielding in the increase of the amount of effective information and generalization ability. Finally, the model is employed to predict the output probability of three public side-channel datasets (e.g. ASCAD, AES
$$\_$$
HD, and AES
$$\_$$
RD), and analyze the recovery key guessing entropy for each key to efficiently assess attack efficiency. Experimental results showcase that the plaintext-extended bilinear feature fusion model can effectively enhance the Side-Channel Attack (SCA) capabilities and prediction performance. Deploying the proposed method, the number of traces required for a successful attack on the ASCAD
$$\_$$
R dataset is significantly reduced to less than 914, representing an 70.5% reduction in traces compared to the network in Convolutional Neural Network-Visual Geometry Group (CNNVGG16) with plaintext, which incorporating plaintext features before the fully connected layer. Compared to existing solutions, the proposed scheme requires only 80% of the power traces for the attack mask design using only 75 epochs. As a result, the power of the proposed method is well proved through the different experiments and comparison processes.
摘要：
The low-latency property is becoming increasingly crucial in response to the demand for data processing in the Internet of Things (IoT) environment, especially in lightweight cryptography. A low-latency lightweight block cipher called LTLBC is proposed in this paper. In particular, we propose a hybrid approach of word-wise involutive mapping and a bit-wise permutation, with careful selection of the shift and permutation parameters. This scheme enables LTLBC to achieve better diffusion than Midori and MANTIS. Also, a 4x4\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$4\times 4$$\end{document} S-box which is constructed through a gate-level bottom-up circuit search has good security and latency characteristics. LTLBC mainly focuses on the hardware environment of fully unrolled architecture. LTLBC achieves a minimum latency of around 4.73 ns, with a total area of only 10007.6 mu m2\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\mu m<^>2$$\end{document} based on NanGate 45nm technology. The comprehensive safety analysis shows LTLBC has sufficient redundancy rounds to resist attacks, such as differential cryptanalysis, linear cryptanalysis, impossible differential cryptanalysis, etc.
期刊：
Pervasive and Mobile Computing,2024年105 ISSN：1574-1192
通讯作者：
Li, L
作者机构：
[Li, Lang] Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.;Hengyang Normal Univ, Hunan Prov Key Lab Intelligent Informat Proc & App, Hengyang 421002, Peoples R China.
通讯机构：
[Li, L ] H;Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.
关键词：
Lightweight block cipher;Substitution Permutation Networks;Involutive S-box;Permutation;Low energy
摘要：
The Internet of Things (IoT) has emerged as a pivotal force in the global technological revolution and industrial transformation. Despite its advancements, IoT devices continue to face significant security challenges, particularly during data transmission, and are often constrained by limited battery life and energy resources. To address these challenges, a low energy lightweight block cipher (INLEC) is proposed to mitigate data leakage in IoT devices. In addition, the Structure and Components INvolution (SCIN) design is introduced. It is constructed using two similar round functions to achieve front-back symmetry. This design ensures coherence throughout the INLEC encryption and decryption processes and addresses the increased resource consumption during the decryption phase in Substitution Permutation Networks (SPN). Furthermore, a low area S-box is generated through a hardware gate-level circuit search method combined with Genetic Programming (GP). This optimization leads to a 47.02% reduction in area compared to the S-0 of Midori, using UMC 0.18 mu m technology. Moreover, a chaotic function is used to generate the optimal nibble-based involutive permutation, further enhancing its efficiency. In terms of performs, the energy consumption for both encryption and decryption with INLEC is 6.88 mu J/bit, representing 25.21% reduction compared to Midori. Finally, INLEC is implemented using STM32L475 PanDuoLa and Nexys A7 FPGA development boards, establishing an encryption platform for IoT devices. This platform provides functions for data acquisition, transmission, and encryption.
通讯机构：
[Li, L ] H;Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.
关键词：
generalized Feistel structure;lightweight block cipher;low power;Permutation;S-box;smart door lock
摘要：
Smart door locks pose a large number of threats such as network attacks. Its storage area and power of cipher are severely limited because the wireless nodes of smart door locks are mostly battery-powered. Therefore, effective security solutions are urgently needed. In this paper, a new lightweight block cipher with low power named LPHD is proposed to ensure the security of the master control chip of the smart door lock terminal. We design a scheme of low power S-box and construct the two-stage permutation layer (TP structure) suitable for LPHD by filtering the sets of 8-bit permutations. LPHD proposes a variant of the 8-branch generalized Feistel structure (GFS) to realize that the bits of all branches are affected in one encryption round. The problem of slow diffusion in the standard Feistel structure is solved. The key schedule adopts the nonlinear design and reuses the encryption process of LPHD. It improves the security of the cipher and reduces hardware overhead. Moreover, we evaluate the hardware implementation and security of LPHD. The results show that LPHD for the unified encryption and decryption circuits requires only 1276 Gate Equivalents (GEs) and 1.914 mu$$ \upmu $$W on UMC 0.18 mu$$ \upmu $$m, which is better than other lightweight block ciphers such as SKINNY, PRESENT, and IVLBC. In summary, LPHD provides sufficient security for the master control chip of the smart door lock terminal. In this paper, a low power lightweight block cipher named LPHD is proposed, and the unified encryption and decryption circuits require only 1276 GEs and 1.914 mu$$ \upmu $$ W on UMC 0.18 mu$$ \upmu $$ m. We built a PCB of smart door lock and successfully used LPHD cipher to realize simulation encryption. image
摘要：
Low-energy lightweight block ciphers are essential for applications with extremely resource-constrained to reduce energy and maintain security. The trade-off between diffusion property and area is a widely studied issue in the design of low-energy block ciphers. In this paper, a low-energy lightweight block cipher named as GFLE is presented. The core cipher of GFLE uses a variant of the Generalized Feistel Structure (GFS) with 4-branch, which combines the Type-II GFS with the simplified Lai-Massey. The DRmax of GFLE has a one-round improvement over the Type-II GFS optimized by Suzaki et al and the security margin is achieved in a shorter number of rounds. Moreover, an S-box with low-energy and good cryptographic properties is proposed by searching combinations based on gate-level circuits using a depth-first strategy. It exhibits better security properties and hardware performance compared to other S-boxes. The block cipher GFLE is implemented in ASIC with UMC 0.18 mu m. It has been proved that the energy of GFLE is lower than Midori, WARP, SKINNY, CRAFT, etc in unified encryption and decryption (ED) circuits. GFLE reduces energy by 61.59% compared with SKINNY. The results show that GFLE in ED circuits consumes only 1596 Gate Equivalents (GEs) and 6.36 mu J/bit in area and energy, respectively.
作者机构：
[Xiang, Jiahao] Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.;Hengyang Normal Univ, Hunan Prov Key Lab Intelligent Informat Proc & App, Hengyang 421002, Peoples R China.;[Li, Lang] Hengyang Normal Univ, Hengyang 421002, Peoples R China.
通讯机构：
[Li, L ] H;Hengyang Normal Univ, Hengyang 421002, Peoples R China.
关键词：
Internet of Things;Lightweight block cipher;Field Programmable Gate Arrays(FPGA);Low-area;High-throughput
摘要：
The rapid growth of the Internet of Things (IoT) highlights the importance of lightweight cryptography in maintaining security. However, enhancing performance while ensuring the same level of security remains a significant challenge. This paper presents two innovative architectures for the CRAFT lightweight block cipher, aiming to enhance performance without compromising security. The novel Serial and Unrolled architectures are introduced to achieve low area usage and high throughput, respectively. Specifically, the Serial architecture reduces the datapath from 64 -bit to 4 -bit, significantly decreasing the area. The Unrolled architecture, on the other hand, minimizes latency from 32 to 16. Additionally, Boolean satisfiability (SAT) solvers are employed to identify a lower-cost area implementation of the S-Box. The proposed designs underwent evaluation on three distinct FPGA platforms: Artix-7, Kintex-7, and Spartan7. The results show that the low area design reduces area usage by 10.16% compared to the previous design. Additionally, the S-Box implementation achieves a significant area reduction of 28.9%. On the other hand, the unrolled design enhances the maximum throughput by 40.53% compared to the previous design. Therefore, the proposed designs could offer enhanced performance while maintaining security for IoT devices.
通讯机构：
[Li, L ] H;Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.;Hengyang Normal Univ, Hunan Prov Key Lab Intelligent Informat Proc & App, Hengyang 421002, Peoples R China.
关键词：
Side-channel analysis;correlation power analysis;genetic algorithm;crossover;mutation
摘要：
Correlation power analysis (CPA) combined with genetic algorithms (GA) now achieves greater attack efficiency and can recover all subkeys simultaneously. However, two issues in GA-based CPA still need to be addressed: key degeneration and slow evolution within populations. These challenges significantly hinder key recovery efforts. This paper proposes a screening correlation power analysis framework combined with a genetic algorithm, named SFGA-CPA, to address these issues. SFGA-CPA introduces three operations designed to exploit CPA characteristics: propagative operation, constrained crossover, and constrained mutation. Firstly, the propagative operation accelerates population evolution by maximizing the number of correct bytes in each individual. Secondly, the constrained crossover and mutation operations effectively address key degeneration by preventing the compromise of correct bytes. Finally, an intelligent search method is proposed to identify optimal parameters, further improving attack efficiency. Experiments were conducted on both simulated environments and real power traces collected from the SAKURA-G platform. In the case of simulation, SFGA-CPA reduces the number of traces by 27.3% and 60% compared to CPA based on multiple screening methods (MS-CPA) and CPA based on simple GA method (SGA-CPA) when the success rate reaches 90%. Moreover, real experimental results on the SAKURA-G platform demonstrate that our approach outperforms other methods.
通讯机构：
[Li, L ] H;Hengyang Normal Univ, Coll Comp Sci & Technol, Hengyang 421002, Peoples R China.;Hengyang Normal Univ, Hunan Prov Key Lab Intelligent Informat Proc & App, Hengyang 421002, Peoples R China.
关键词：
Side -channel analysis;inner product masking;mutual information;nonlinear leakage
摘要：
The Inner Product Masking (IPM) scheme has been shown to provide higher theoretical security guarantees than the Boolean Masking (BM). This scheme aims to increase the algebraic complexity of the coding to achieve a higher level of security. Some previous work unfolds when certain (adversarial and implementation) conditions are met, and we seek to complement these investigations by understanding what happens when these conditions deviate from their expected behaviour. In this paper, we investigate the security characteristics of IPM under different conditions. In adversarial condition, the security properties of first-order IPMs obtained through parametric characterization are preserved in the face of univariate and bivariate attacks. In implementation condition, we construct two new polynomial leakage functions to observe the nonlinear leakage of the IPM and connect the security order amplification to the nonlinear function. We observe that the security of IPM is affected by the degree and the linear component in the leakage function. In addition, the comparison experiments from the coefficients, signal-to-noise ratio (SNR) and the public parameter show that the security properties of the IPM are highly implementation-dependent.
期刊：
JOURNAL OF INTELLIGENT & FUZZY SYSTEMS,2024年1(1):1-15 ISSN：1064-1246
作者机构：
College of Computer Science and Technology, Hengyang Normal University, Hengyang, China;Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang, China;[Yongchao Li] School of Computer Science and Information Security, Guilin University of Electronic Technology, Guilin, China;[Ying Huang; Lang Li; Di Li] College of Computer Science and Technology, Hengyang Normal University, Hengyang, China<&wdkj&>Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang, China
关键词：
Internet of Things (IoT);involutive;lightweight block cipher;permutation;S-box;security
摘要：
Nowadays, the use of the Internet of Things has reached a commanding height in a new round of economic and technological upsurge. Its data transmission security has attracted much attention. It is well known that substitution permutation networks (SPNs) ciphers with high diffusion are not advantageous in unified encryption and decryption circuits with extremely resources constrained. Although some research has been carried out to address this issue, there are still insufficiencies. In this article, we propose a new 64-bit lightweight block cipher based on SPN named IVLBC, whose key allows 80 and 128 bits. The components of IVLBC are involutions. In particular, we propose a Feistel with tree structure to obtain a compact and involutive S-box. Also, the nibble-based involutive permutation is proposed to obtain the involutive permutation. Decryption can reuse encrypted code and circuitry in both software and hardware implementations. We prove that the costs of IVLBC are less than PRESENT, PRINCE, Midori, I-PRESENTTM, CRAFT, etc., in unified encryption and decryption circuits. In addition, we conduct other performance tests on IVLBC such as the differential attack, linear attack, integral attack, algebraic attack, invariant attacks, etc.
通讯机构：
[Lang Li] C;College of Computer Science and Technology, Hengyang Normal University, Hengyang 421002, China<&wdkj&>Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang 421002, China
关键词：
ARX-Based lightweight block cipher;High-diffusion architecture;Mixed integer linear programming;SAND
摘要：
Recently, there has been renewed interest in the combination of deep learning and side-channel analysis (SCA). Many previous studies have transformed the traditional SCA into a classification problem in deep learning. This paper considers it as a regression problem based on the principle that the changes of some circuit states are related to the special operation in cipher. We proposed a regression model which consists of an initial layer, a deep feature mining dense layer, and a regression layer. In the term of dataset, there are two sources of data: the raw ASCAD power traces and the data sampled from FPGA implementation of AES and PRESENT. The mainly advantages of this model and regression task processing method is that it can adapt to different cryptographic algorithms on the same hardware device. Moreover, the experimental result that the model can significantly improve the attack accuracy of SCA. In ASCAD, its prediction accuracy achieves 2.90% and 3.63% for two different intermediate values, and their correlation coefficient evaluation 0.873, 0.840. In FPGA power dataset, their prediction and correlation coefficient are 3%, 4%, and 0.963, 0.987 respectively.
作者机构：
[李浪; 冯景亚; 刘波涛; 郭影; 李秋萍] Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang;421002, China;College of Information Science and Engineering, Hunan Normal University, Changsha;410081, China;College of Computer Science and Technology, Hengyang Normal University, Hengyang
通讯机构：
[Jingya Feng] H;Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang Normal University, Hengyang, China<&wdkj&>College of Information Science and Engineering, Hunan Normal University, Changsha, China
期刊：
Advances in Intelligent Systems and Computing,2021年1143:43-53 ISSN：2194-5357
通讯作者：
Li, L.
作者机构：
College of Computer Science and Technology, Hengyang Normal University, Hengyang, 421002, China;Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang, 421002, China;[Guo Y.; Huang X.; Li L.] College of Computer Science and Technology, Hengyang Normal University, Hengyang, 421002, China, Hunan Provincial Key Laboratory of Intelligent Information Processing and Application, Hengyang, 421002, China
通讯机构：
[Li, L.] C;College of Computer Science and Technology, China
会议名称：
9th International Conference on Computer Engineering and Networks, CENet2019
会议时间：
18 October 2019 through 20 October 2019
会议论文集名称：
Proceedings of the 9th International Conference on Computer Engineering and Networks
